SOC Design Verification Engineer, Principal

General Information

Job Title SOC Design Verification Engineer, Principal Job ID 9966 City Plano State/Province Texas Date Posted 05-Mar-2025 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Base Salary Range: $165000 - $247000

Descriptions & Requirements

Job Description and Requirements

 We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and experienced SoC Verification Engineer who thrives in a dynamic and collaborative environment. You possess a strong background in ASIC verification, with a particular emphasis on designing and writing constrained-random SystemVerilog testbenches using UVM. You have a keen eye for detail and take pride in ensuring that every design meets the highest standards of quality and performance. 

This is a “hands-on” technical leadership role that includes taking on many aspects of design development cycle including Verification Plan development, Testbench, VIP development and Integration, Regressions and Gate Level Simulations to achieve design closure. In addition, you will be interacting with customers and other Synopsys teams to gather requirements, estimate effort, cost, schedules, design size and feasibility studies while mentoring junior engineers. You are adept at debugging RTL and GLS failures, and your problem-solving skills are second to none. Your communication skills enable you to effectively convey complex technical concepts to both technical and non-technical stakeholders. You are committed to staying abreast of the latest industry trends and technologies, and you are eager to contribute to the development of next-generation, high-performance ASICs.

What You’ll Be Doing:

• Work with Synopsys customers to understand their needs and define verification scope and activities.
• Understand the complexity and requirements of verification and propose resource requirements to complete the activities
• Technical lead team of engineers to perform various pre-silicon verification activities on IPs/Subsystems.
• Defining and tracking Verification test plans
• Designing and writing constrained-random SystemVerilog testbenches using UVM
• Writing SystemVerilog assertions
• Writing functional coverage
• Debugging RTL and GLS failures
• Conducting code coverage analysis
• Providing mentoring and guidance to less experienced team members

The Impact You Will Have:

• Ensuring the highest quality and performance of our ASIC designs
• Contributing to the successful delivery of high-performance computing solutions
• Supporting the development of innovative technologies for a wide range of applications
• Enhancing the efficiency and effectiveness of our verification processes
• Strengthening our reputation as a leader in chip design and verification
• Driving continuous improvement and innovation within the team

What You’ll Need:

• BSEE in Electrical Engineering with 10+ years of industry experience
• Proficiency in digital verification in a UVM environment; formal verification experience is a plus
• Knowledge of various protocols (PCIe, Ethernet, USB, DDR, etc) and/or processor/interconnect/debug architecture
• Hand on experience with verification tools such as VCS, waveform analyzer and VIP integration
• Expertise in Verilog, SystemVerilog, and Perl/Python scripting

Who You Are:

• An excellent communicator with strong problem-solving skills
• Technical expertise in various aspects of pre-silicon Verification (UVM, Coverage Analysis, Verification plan creation, debugging, etc)
• Ability to lead a team to perform verification on complex SoC/IP/Subsystems
• An innovative thinker who stays current with industry trends and technologies
• A proactive and self-motivated professional with a strong work ethic

The Team You’ll Be A Part Of:

The Systems Solutions Group (SSG) delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to enable leading-edge customers to complete their most challenging SoC design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. Our customers develop SoCs for high-performance computing, automotive, aerospace & defense, and more.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

 

 

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.